Simulation of a Low-Voltage Direct Current System Using T-SFCL to Enhance Low Voltage Ride through Capability

Owing to the increasing penetration level of distributed energy resources (DER) and direct current (DC) load, usage low-voltage (LVDC) systems has expanded achieve efficient operations. However, because LVDC system reaches peak fault at a faster rate than alternating (AC) system, solution that protects components is necessary maintain integrity. It required by ride-through (LVRT) DERs their interconnections with support recovery. In this study, method proposed allow application superconducting limiter (SFCL) reduce enhance LVRT capability. when DER connection recovery, conventional resistive-type SFCL must withstand burden high-temperature (HTSC) operation during state dependence on LVRT. Therefore, study proposes trigger-type HTSC element The voltage sag related was improved owing SFCL. confirmed using PSCAD/EMTDC, which commercial software.